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10.3 TOP (Output-Related 16-Bit Timer)

MULTIJUNCTION TIMERS

10-78

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

(2) Correction function of TOP single-shot output mode

To change the counter value while in progress, write to the TOP correction register a value by which the

counter value is to be increased or reduced from its initial set value. To add, write the value to be added to

the correction register directly as is. To subtract, write the 2’s complement of the value to be subtracted to

the correction register.

The counter is corrected synchronously with a count clock pulse next to one at which the correction value was

written to the TOP correction register. If the counter is corrected this way, note that because one down count in

that clock period is canceled, the counter value actually is corrected by "correction register value + 1."

For example, if the initial counter value is 7 and the value 3 is written to the correction register when the

counter has down counted to 3, then the counter counts a total of 12 before it underflows.

Figure 10.3.9 Example of Counting in TOP Single-shot Output Mode When Count is Corrected

When writing to the correction register, be careful not to cause the counter to overflow. Even if the counter

overflows due to correction of counts, no interrupt requests are generated for reasons of an overflow.

234

567

H'FFFF

Correction

Underflow

Count value = (7 + 1) + (3 + 1) = 12

Count clock

dependent delay

Enable

Reload

Counter

Interrupt request

Count clock

(Note 1)

Note 1: What actually is seen in the cycle immediately after enable is the previous counter value, and not 7.

Note 2: The value that "reload register - 1" is reloaded.

Note: • This diagram does not show detailed timing information.

Indeterminate

value

(Note 2)

+ 3

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