32186 datasheet(282/1032 Pages) RENESAS

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DMAC

9-36

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

9.2 DMAC Related Registers

DMA0–4 Interrupt Request Mask Register (DM04ITMK)

<Address: H’0080 0401>

1011121314

b15

DMITMK4 DMITMK3

DMITMK1 DMITMK0

DMITMK2

00000

Bit Name

Function

8–10

No function assigned. Fix to "0."

DMITMK4 (DMA4 interrupt request mask bit)

0: Enable interrupt request

DMITMK3 (DMA3 interrupt request mask bit)

1: Mask (disable) interrupt request

DMITMK2 (DMA2 interrupt request mask bit)

DMITMK1 (DMA1 interrupt request mask bit)

DMITMK0 (DMA0 interrupt request mask bit)

DMA5–9 Interrupt Request Mask Register (DM59ITMK)

<Address: H’0080 0409>

1011121314

b15

DMITMK9 DMITMK8

DMITMK6 DMITMK5

DMITMK7

00000

Bit Name

Function

8–10

No function assigned. Fix to "0."

DMITMK9 (DMA9 interrupt request mask bit)

0: Enable interrupt request

DMITMK8 (DMA8 interrupt request mask bit)

1: Mask (disable) interrupt request

DMITMK7 (DMA7 interrupt request mask bit)

DMITMK6 (DMA6 interrupt request mask bit)

DMITMK5 (DMA5 interrupt request mask bit)

The DMA Interrupt Request Mask Register is used to mask interrupt requests on each DMA channel.

(1) DMITMKn (DMAn Interrupt Request Mask) bit (n = 0–9)

Setting the DMAn interrupt request mask bit to "1" masks the interrupt requests on DMAn channel.

However, if an interrupt request occurs, the DMAn interrupt request status bit is always set to "1"

irrespective of the contents of this mask register.

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