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32192 Datasheet(PDF) 44 Page - Renesas Technology Corp |
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32192 Datasheet(HTML) 44 Page - Renesas Technology Corp |
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44 / 1044 page ![]() 1-24 1 32192/32195/32196 Group Hardware Manual OVERVIEW Rev.1.10 REJ09B0123-0110 Apr.06.07 1.4 Pin Assignments Note 1: The pins outputted at two places. Note 2: The JTCK, JTDI, JTDO and JTMS pins are reset by input from the JTRST pin, and not reset from the RESET# pin. Note 3: THERMAL BALL must be connected to the ground (GND). Table 1.4.2 Pin Assignments of the M32192F8xWG (4/4) Port Function 1 Function 2 DRI function NBD function Function Type State during reset State upon exiting reset P9 EXCVCC - EXCVCC -- - - EXCVCC -- - P10 N.C. - -- - - - - -- - P11 VCCER - VCCER -- Input/Output - VCCER -- - P12 P84/SCLKI0/ SCLKO0/TO24 - SCLKI0/ SCLKO0 -- Input/Output VCCE P84 Input Hi-Z Hi-Z P13 N.C. - -- - - - - -- - P14 P62 P62 -- - Input/Output VCCE P62 Input Hi-Z Hi-Z P15 P61 P61 -- - Input/Output VCCE P61 Input Hi-Z Hi-Z R1 N.C. - - - - - - - - - - During single-chip and external extension modes P14 Input Hi-Z Hi-Z During processor mode DB12 Input/Output Hi-Z Hi-Z R3 N.C. - - - - - - - - - - R4 VSS - VSS -- - - VSS -- - R5 AD0IN1 - AD0IN1 -- Input AVCC0 AD0IN1 Input Hi-Z Hi-Z R6 AD0IN5 - AD0IN5 -- Input AVCC0 AD0IN5 Input Hi-Z Hi-Z R7 AD0IN9 - AD0IN9 -- Input AVCC0 AD0IN9 Input Hi-Z Hi-Z R8 AD0IN13 - AD0IN13 -- Input AVCC0 AD0IN13 Input Hi-Z Hi-Z R9 AVSS0 - AVSS0 -- - - AVSS0 -- - R10 N.C. - -- - - - - -- - R11 P175/RXD2/TO27 P175 RXD2 TO27 (Note 1) - Input/Output VCCE P175 Input Hi-Z Hi-Z R12 P83/RXD0/TO25 P83 RXD0 TO25 (Note 1) - Input/Output VCCE P83 Input Hi-Z Hi-Z R13 P86/RXD1/TO22 P86 RXD1 TO22 (Note 1) - Input/Output VCCE P86 Input Hi-Z Hi-Z R14 VSS - VSS -- - - VSS -- - R15 EXCVDD - EXCVDD -- - - EXCVDD -- - Pin No. Symbol Function Type Power supply Condition Pin state when reset R2 P14/DB12/ TO33/DD12 P14 DB12 TO33 (Note 1) DD12 (Note 1) Input/Output VCC-BUS |
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