32192 datasheet(8/1044 Pages) RENESAS

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Contents-2

32192/32195/32196 Group Hardware Manual

Rev.1.10 REJ09B0123-0110 Apr.06.07

CHAPTER 4 EIT

4.1 Outline of EIT --------------------------------------------------------------------------------------------------------------- 4-2

4.2 EIT Events ------------------------------------------------------------------------------------------------------------------- 4-3

4.2.1

Exception --------------------------------------------------------------------------------------------------------- 4-3

4.2.2

Interrupt ----------------------------------------------------------------------------------------------------------- 4-5

4.2.3

Trap ---------------------------------------------------------------------------------------------------------------- 4-6

4.3 EIT Processing Procedure ----------------------------------------------------------------------------------------------- 4-6

4.4 EIT Processing Mechanism --------------------------------------------------------------------------------------------- 4-7

4.5 Acceptance of EIT Events ----------------------------------------------------------------------------------------------- 4-8

4.6 Saving and Restoring the PC and PSW ------------------------------------------------------------------------------ 4-8

4.7 EIT Vector Entry ----------------------------------------------------------------------------------------------------------- 4-10

4.8 Exception Processing ---------------------------------------------------------------------------------------------------- 4-11

4.8.1

Reserved Instruction Exception (RIE) ---------------------------------------------------------------------- 4-11

4.8.2

Address Exception (AE) -------------------------------------------------------------------------------------- 4-12

4.8.3

Floating-Point Exception (FPE) ----------------------------------------------------------------------------- 4-13

4.9 Interrupt Processing ------------------------------------------------------------------------------------------------------- 4-15

4.9.1

Reset Interrupt (RI) --------------------------------------------------------------------------------------------- 4-15

4.9.2

System Break Interrupt (SBI) -------------------------------------------------------------------------------- 4-15

4.9.3

External Interrupt (EI) ------------------------------------------------------------------------------------------ 4-17

4.10 Trap Processing ---------------------------------------------------------------------------------------------------------- 4-18

4.10.1

Trap ---------------------------------------------------------------------------------------------------------------- 4-18

4.11 EIT Priority Levels -------------------------------------------------------------------------------------------------------- 4-19

4.12 Example of EIT Processing -------------------------------------------------------------------------------------------- 4-20

4.13 Notes on EIT --------------------------------------------------------------------------------------------------------------- 4-22

CHAPTER 5 INTERRUPT CONTROLLER (ICU)

5.1 Outline of the Interrupt Controller --------------------------------------------------------------------------------------- 5-2

5.2 ICU Related Registers ---------------------------------------------------------------------------------------------------- 5-4

5.2.1

Interrupt Vector Register -------------------------------------------------------------------------------------- 5-5

5.2.2

Interrupt Request Mask Register ---------------------------------------------------------------------------- 5-6

5.2.3

SBI (System Break Interrupt) Control Register ---------------------------------------------------------- 5-7

5.2.4

Interrupt Control Registers ------------------------------------------------------------------------------------ 5-8

5.3 Interrupt Request Sources in Internal Peripheral I/O -------------------------------------------------------------- 5-11

5.4 ICU Vector Table ----------------------------------------------------------------------------------------------------------- 5-12

5.5 Description of Interrupt Operation -------------------------------------------------------------------------------------- 5-13

5.5.1

Acceptance of Internal Peripheral I/O Interrupts --------------------------------------------------------- 5-13

5.5.2

Processing by Internal Peripheral I/O Interrupt Handlers ---------------------------------------------- 5-14

5.6 Description of System Break Interrupt (SBI) Operation ----------------------------------------------------------- 5-17

5.6.1

Acceptance of SBI ---------------------------------------------------------------------------------------------- 5-17

5.6.2

SBI Processing by Handler ----------------------------------------------------------------------------------- 5-17

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