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SH7021 Datasheet(PDF) 38 Page - Renesas Technology Corp |
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SH7021 Datasheet(HTML) 38 Page - Renesas Technology Corp |
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38 / 509 page ![]() RENESAS17 MACL PR PC (sign extended) MACH 31 9 0 0 0 31 31 Multiply and accumulate (MAC) registers high and low (MACH, MACL): Store the results of multiply and accumulate opera- tions. MACH is sign-extended when read because only the lowest 10 bits are valid. Procedure register (PR): Stores a return address from a subroutine procedure. Program counter (PC): Indicates the fourth byte (second instruction) after the current instruction. Figure 2.3 System Registers 2.1.4 Initial Values of Registers Table 2.1 lists the values of the registers after reset. Table 2.1 Initial Values of Registers Classification Register Initial Value General register R0–R14 Undefined R15 (SP) Value of the stack pointer in the vector address table Control register SR Bits I0-I3 are 1111(H'F), reserved bits are 0, and other bits are undefined GBR Undefined VBR H'00000000 System register MACH, MACL, PR Undefined PC Value of the program counter in the vector address table 2.2 Data Formats 2.2.1 Data Format in Registers Register operands are always long words (32 bits). When the memory operand is only a byte (8 bits) or a word (16 bits), it is sign-extended into a long word when stored into a register (figure 2.4). |
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