SH7021 datasheet(84/509 Pages) RENESAS

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5.2.5

Interrupt Exception Vectors and Priority Rankings

Table 5.3 lists the vector numbers, vector table address offsets, and interrupt priority order of the

interrupt sources.

Each interrupt source is allocated a different vector number and vector table address offset. The

vector table address is calculated from this vector number and address offset. In interrupt

exception processing, the exception service routine start address is fetched from the vector table

indicated by this vector table address. See table 4.3, Calculation of Exception Vector table

Addresses, in section 4, Exception Processing, for details on this calculation.

Arbitrary interrupt priority levels between 0 and 15 can be assigned to IRQ and on-chip peripheral

module interrupt sources by setting interrupt priority registers A–E (IPRA–IPRE) for each pin or

module. The interrupt sources for IPRC–IPRE, however, must be ranked in the order listed under

Priority Within Module in table 5.3 and cannot be changed. A reset assigns priority level 0 to IRQ

and on-chip peripheral module interrupts. If the same priority level is assigned to two or more

interrupt sources, and interrupts from those sources occur simultaneously, their priority order is

the default priority order indicated at the right in table 5.3.

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