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SH7021 Datasheet(PDF) 91 Page - Renesas Technology Corp |
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SH7021 Datasheet(HTML) 91 Page - Renesas Technology Corp |
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91 / 509 page ![]() 72 RENESAS 5.4.2 Stack after Interrupt Exception Processing Figure 5.3 shows the stack after interrupt exception processing. Upper 16 bits Lower 16 bits Upper 16 bits Lower 16 bits SR PC*2 Address 4n–8 4n–6 4n–4 4n–2 4n SP*3 Notes: 1. Bus width is 16 bits. 2. PC stores the top address of the next instruction (return instruction) after the executed instruction. 3. The value of SP must always be a multiple of four. Figure 5.3 Stack after Interrupt Exception Processing |
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