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HD64F7047 Datasheet(PDF) 154 Page - Renesas Technology Corp

Part # HD64F7047
Description  Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series
PDF  764 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F7047 Datasheet(HTML) 154 Page - Renesas Technology Corp

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Rev. 2.00, 09/04, page 114 of 720
8.2.2
DTC Source Address Register (DTSAR)
The DTC source address register (DTSAR) is a 32-bit register that specifies the DTC transfer
source address. Specify an even address in case the transfer size is word; specify a multiple-of-
four address in case of longword. The initial value is undefined.
8.2.3
DTC Destination Address Register (DTDAR)
The DTC destination address register (DTDAR) is a 32-bit register that specifies the DTC transfer
destination address. Specify an even address in case the transfer size is word; specify a multiple-
of-four address in case of longword. The initial value is undefined.
8.2.4
DTC Initial Address Register (DTIAR)
The DTC initial address register (DTIAR) is a 32-bit register that specifies the initial transfer
source/transfer destination address in repeat mode. In repeat mode, when the DTS bit is set to 1,
specify the initial transfer source address in the repeat area, and when the DTS bit is cleared to 0,
specify the initial transfer destination address in the repeat area. The initial value is undefined.
8.2.5
DTC Transfer Count Register A (DTCRA)
DTCRA is a 16-bit register that designates the number of times data is to be transferred by the
DTC. The initial value is undefined.
In normal mode, the entire DTCRA functions as a 16-bit transfer counter (1 to 65536). It is
decremented by 1 every time data is transferred, and transfer ends when the count reaches H'0000.
The number of transfers is 1 when the set value is H'0001, 65535 when it is H'FFFF, and 65536
when it is H'0000.
In repeat mode, DTCRAH maintains the transfer count and DTCRAL functions as an 8-bit
transfer counter. The number of transfers is 1 when the set value is DTCRAH = DTCRAL = H'01,
255 when they are H'FF, and 256 when it is H'00.
In block transfer mode, it functions as a 16-bit transfer counter. The number of transfers is 1 when
the set value is H'0001, 65535 when it is H'FFFF, and 65536 when it is H'0000.
8.2.6
DTC Transfer Count Register B (DTCRB)
The DTCRB is a 16-bit register that designates the block length in block transfer mode. The block
length is 1 when the set value is H'0001, 65535 when it is H'FFFF, and 65536 when it is H'0000.
The initial value is undefined.



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