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HD64F7047 Datasheet(PDF) 155 Page - Renesas Technology Corp |
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HD64F7047 Datasheet(HTML) 155 Page - Renesas Technology Corp |
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155 / 764 page ![]() Rev. 2.00, 09/04, page 115 of 720 8.2.7 DTC Enable Registers (DTER) DTER which is comprised of seven registers, DTEA to DTEF, is a register that specifies DTC activation interrupt sources. The correspondence between interrupt sources and DTE bits is shown in table 8.1. Bit Bit Name Initial Value R/W Description 7 6 5 4 3 2 1 0 DTE*7 DTE*6 DTE*5 DTE*4 DTE*3 DTE*2 DTE*1 DTE*0 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W DTC Activation Enable 7 to 0 Setting this bit to 1 specifies the corresponding interrupt source to a DTC activation source. [Clearing conditions] • When the DISEL bit is 1 and the data transfer has ended • When the specified number of transfers have ended • 0 is written to the bit to be cleared after 1 has been read from the bit These bits are not cleared when the DISEL bit is 0 and the specified number of transfers have not ended. [Setting condition] 1 is written to the bit to be set after a 0 has been read from the bit Note: * The last character of the DTC enable register’s name comes here. Example: DTEB3 in DTEB, etc. |
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