MAC7200 datasheet(364/976 Pages) FREESCALE

364 / 976 page

MCM as Implemented on MAC7200

MAC7200 Microcontroller Family Reference Manual, Rev. 2

286

Freescale Semiconductor

•

Added NMI functionality and NMICR register

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Changed AAMR reset value from $F000_xxxx to $F0D0_xxxx

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Added MUDCR register (used as the Flash main array WACC register)

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REV register value is changed to $7210 (PCT is unchanged)

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Single bit ECC error reporting is now enabled (enb_ecc_rpt = 1)

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ECC interrupt (ipi_ecc_int) now used (with Request $0017)

13.3.6

MCM Application Usage

Unless explicitly described below, all application information can be found in the MCM Block Guide.

13.3.6.1

Enabling the MCM

It is not necessary to enable the MCM before it can be used.

13.3.6.2

ECC

For special memory initialization requirements of the SRAM, please refer to Section 19.1.6, “SRAM

Application Usage”.

13.3.6.3

Flash

Please refer to Section 18.7.4.2, “Flash MCM Registers”.

13.3.6.4

AAMR

For information on how to use the AAMR register, please refer to Section 9.16.4, “Programming the

AAMR register in the MCM”.

13.3.6.5

NMI

For more information on NMI implementation and usage, please refer to Section 7.3.4, “Non-Maskable

Interrupt (NMI)”. In particular, the following usage points should be noted:

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Existing Instruction Abort service routines must be modified in order to use the NMI feature.

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The NMI may be used either in a re-entrant or non re-entrant manner, selectable in software.

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Once the NMI is enabled, and the polarity set, it can not be disabled or the polarity changed without

resetting the device.

13.3.6.6

REV Register

The lower 4 bits of the REV register are used to indicate the mask revision for a particular device, and are

also readable directly through the JTAG interface.

MAC7200 Datasheet(PDF) 364 Page - Freescale Semiconductor, Inc

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