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MAC7200 Datasheet(PDF) 361 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 361 Page - Freescale Semiconductor, Inc

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MCM as Implemented on MAC7200
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
283
13.3.2.2
Revision ID (REV)
This 16-bit register identifies the revision ID of the device.
13.3.2.3
AXBS Master/Slave Configuration
The AMC and ASC registers in the MCM indicate the presence of AXBS masters and slaves. Please refer
to Chapter 15, “MAC7200 Crossbar Switch (AXBS)” for a listing of which AXBS masters/slaves are
present on the MAC72xx.
13.3.2.4
Misc. Reset Status Register (MRSR)
On the MAC72xx, all reset sources all consolidated into the CRG module. Therefore, this feature in the
MCM will not be used, and will be removed from the MCM Block Guide for the MAC72xx.
13.3.2.5
Misc. Wakeup Control Register (MWCR)
Since the MAC72xx only supports DOZE mode, this register is used to control wake-up from DOZE mode
with an interrupt. STOP mode is not supported.
13.3.2.6
Software Watchdog Timer (SWT)
The SWT will interrupt the processor periodically to request servicing (in order to prevent software
deadlock or runaway). The SWT includes enable/disable, interrupt/reset and programmable period
functionality.
The SWT interrupt is connected to on-platform interrupt Request #17, and the SWT reset signal will be
fed off-platform to the CRG to allow for soft-reset on a SWT timeout. The SWT clock may be fed from
either the oscillator clock, in normal mode, or from the PLL, when the system enters Self Clock Mode.
By programming the BDMCTL register in the CRG module, the system can automatically stop and start
the SWT counters when the system enters debug mode.
ColdFire v4
$CF40
ColdFire v5
$CF50
Z650 PowerPC
$E650
Table 13-40. MAC72xx PCT and REV registers
Device
PCT
REV
MAC72x2 (0M84D Maskset)
$A700
$7220 1
1. Due to erratum MUCts03562, 0M84D and 1M84D masks share the same revision number
MAC72x2 (1M84D Maskset)
$A700
$7220 1
MAC72x1 (0M19G Maskset)
$A700
$7230
Table 13-39. Processor Core Type (PCT) Values (Continued)
Core
PCT
Comment



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