MAC7200 datasheet(358/976 Pages) FREESCALE

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Memory Map/Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

280

Freescale Semiconductor

13.2.2.16.5

Core Fault Data Register (CFDTR)

The CFDTR is a 32-bit register for capturing the data associated with the last faulted processor write data

access from the device’s AMBA-AHB bus. The CFDTR is valid only for faulted AMBA-AHB write

accesses. The contents of this register are not valid if the last fault occurred on the core’s local bus

(CFLOC[LocalErr] = 1). This register is not updated on AMBA-AHB read access faults.

This register can only be read from the IPS programming model; any attempted write is ignored. See

Figure 13-40 and Table 13-37 for the Core Fault Data Register definition.

Table 13-36. CFATR Field Descriptions

Field

Description

Write

WRITE.

0 Core read access

1 Core write access

6–4

Size[2:0]

SIZE[2:0].

000 8-bit core access

001 16-bit core access

010 32-bit core access

011 64-bit core access

1xx Reserved

3–0

Protection[3:0]

PROT[3:0].

Protection[3]: Cacheable

0 Non-cacheable

1 Cacheable

Protection[2]: Bufferable

0 Non-bufferable

1Bufferable

Protection[1]: Mode

0 User mode

1 Supervisor mode

Protection[0]: Type

1 Data

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