MAC7200 datasheet(354/976 Pages) FREESCALE

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Memory Map/Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

276

Freescale Semiconductor

13.2.2.15.12 RAM ECC Data Register (REDR)

The REDR is a 32-bit register for capturing the data associated with the last, properly-enabled ECC event

in the RAM memory. Depending on the state of the ECC Configuration Register, an ECC event in the

RAM causes the address, attributes and data associated with the access to be loaded into the REAR, RESR,

REMR, REAT and REDR registers, and the appropriate flag (R1BC or RNCE) in the ECC Status Register

to be asserted.

The data captured on a multi-bit non-correctable ECC error is undefined.

This register can only be read from the IPS programming model; any attempted write is ignored. See

Figure 13-35 and Table 13-32 for the RAM ECC Data Register definition.

Table 13-31. REAT Field Descriptions

Field

Description

Write

AMBA-AHB HWRITE.

0 AMBA-AHB read access

1 AMBA-AHB write access

6–4

Size[2:0]

AMBA-AHB HSIZE[2:0].

000 8-bit AMBA-AHB access

001 16-bit AMBA-AHB access

010 32-bit AMBA-AHB access

011 Reserved

1xx Reserved

3–0

Protection[3:0]

AMBA-AHB HPROT[3:0].

Protection[3]: Cacheable

0 Non-cacheable

1 Cacheable

Protection[2]: Bufferable

0 Non-bufferable

1Bufferable

Protection[1]: Mode

0 User mode

1 Supervisor mode

Protection[0]: Type

0I-Fetch

1 Data

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