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MAC7200 Datasheet(PDF) 457 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 457 Page - Freescale Semiconductor, Inc |
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457 / 976 page ![]() Platform RAM Array Controller (PRAM_CTL) MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 379 Figure 19-1. Simplified Platform Block Diagram In Figure 19-1, the platform bus is the AMBA AHB, the AXBS is the AHB crossbar switch (arbiter), and the MCM is the Miscellaneous Control Module where error detection information is stored. Refer to the appropriate chapter for a complete description. Contained in this document are descriptions of: interfaces to the AHB, MCM and RAM array; the ECC (Error Correcting Code) algorithm and functionality; block timing constraints; timing diagrams illustrating functionality and perfomance; and overall block functionality descriptions. Shown in Figure 19-2 is a block diagram illustrating the 32 bit AHB to 17/18 bit PRAM address path and the 64/32 bit AHB to 78/39 bit PRAM data path through the module. Core Complex A X B S PRAM CTL RAM Array(s) DMA2 AHB Platform Off Platform Master MCM AHB AIPS IPS IPS Slave(s) |
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