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MAC7200 Datasheet(PDF) 458 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 458 Page - Freescale Semiconductor, Inc |
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458 / 976 page ![]() Platform RAM Array Controller (PRAM_CTL) MAC7200 Microcontroller Family Reference Manual, Rev. 2 380 Freescale Semiconductor Figure 19-2. Block Diagram: PRAM_CTL Figure 19-2 above shows the address and data paths throughout the PRAM_CTL. d.width above represents the parameterizable data width of the module which can be set to values of 64 or 32. t.width (total width) and a.width (address width) are derived from the data width parameter. t.width is a combination of the data width and 7 ECC bits for each 32 bits of data. a.width has a value of 17 bits for a 64 bit data path and 18 bits for a 32 bit data path. haddr pram_addr hwdata pram_wdata, ECC Encode pram_wdata_ecc hrdata ECC Decode pram_rdata, pram_rdata_ecc Late Write Buffer d.width a.width t.width t.width a.width d.width t.width reg select hbstrb read / write / late write Read Modify Write Reg Address Buffer1 write hit? Error Injection Address Buffer2 Note: 1 Red : Address Path 2 Blue : Write Data Path 3 Magenta : Read Data Path |
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