MAC7200 datasheet(489/976 Pages) FREESCALE

489 / 976 page

Interrupts

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

411

22.4.7.2

Description of Reset Operation

22.4.7.2.1

Power-On Reset (POR)

During chip power-up the digital core may not work if its supply voltage VDD15 is below the POR

deassertion level (VPORD). Therefore signal POR which forces the other blocks of the device into reset is

kept high until VDD15 exceeds VPORD. The MCU will run the start-up sequence after POR deassertion.

The power-on reset is active in all operation modes of VREG_HIP7A.

22.4.7.2.2

Low Voltage Reset (LVR)

For details on low voltage reset see Section 22.4.4, “LVR15 - Low Voltage Reset,” Section 22.4.5,

“LVR33 - Low Voltage Reset,” and Section 22.4.6, “LVRPLL - Low Voltage Reset.”

22.5

Interrupts

There are no interrupts driven by the VREG_HIP7A block. All voltage related interrupts are driven by the

Clock and Reset Generation (CRG) Block.

22.6

VREG Bus Aborts

There is no bus interface on the Voltage Regulator, as all associated control and status bits are located

inside the CRG module.

22.7

VREG Differences from MAC71xx

•

Removed Standby Mode (Required only for STOP mode)

•

Removed RC oscillator/Asynchronous Periodic Interrupt (API)

•

Removed Low Voltage interrupt (LVIE,LVIF)

•

Moved LVDS register bit functionality into the CRG Module (See reset source reg in CRG)

MAC7200 Datasheet(PDF) 489 Page - Freescale Semiconductor, Inc