| Electronic Components Datasheet Search |
|
MAC7200 Datasheet(PDF) 535 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MAC7200 Datasheet(HTML) 535 Page - Freescale Semiconductor, Inc |
|
535 / 976 page ![]() Functional Description MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 457 25.4 Functional Description This section provides a complete functional description of the System Services Module. The primary purpose of the SSM is to provide information about the current state and configuration of the system that may be useful for configuring application software and for debug of the system. 25.4.1 System Configuration/Status The MAC7200 provides three registers in the SSM to aid in configuring software and debugging your system: •STATUS • MEMCONFIG The STATUS register is a 16-bit read-only register that reflects the current status of the DMA, and is primarily used for debug. By reading the STATUS register, you can determine which DMA channel, if any, is currently active. This information should not be used as part of the execution of application code, but Address Refer to Table 25-1 Access: Refer to Table 25-12 15 14 13 12 11 10 9876543210 R SYSRESET W RESET: 000000000000000 0 = Writes have no effect on this bit rsvd = Reserved for future use Figure 25-6. System Reset (SYSRESET) Register Table 25-11. SYSRESET Field Descriptions Field Description 15–0 SYS RESET Execute a system reset. This register enables software to reset the system. In order to prevent spurious resets, a hardware interlock has been implemented. In order to reset the system, the following sequence of writes must be executed: • 16-bit Write of 0xb6b6 • 16-bit Write of 0x3535 Once the final write to the SYSRESET register is performed, the system will reset itself. If any value other than 0x3535 is written to the register after writing 0xb6b6, or an 8-bit write of the register is performed, the sequence must be started again from the beginning. Once the final write is performed, the system will reset itself, with all further writes to the register being ignored until the reset sequence is complete. Table 25-12. SYSRESET Allowed Register Accesses 8-bit 16-bit 32-bit READ Allowed Allowed Allowed WRITE Not Allowed Allowed Not Allowed |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |