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MAC7200 Datasheet(PDF) 562 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 562 Page - Freescale Semiconductor, Inc |
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562 / 976 page ![]() Memory Map and Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 484 Freescale Semiconductor Address: Base + xx – 1 Access: User read/write 765 43210 R ENBL TRIG SOURCE W Reset 00000000 Figure 27-2. Channel Configuration Registers (CHCONFIGxx) Table 27-3. CHCONFIGxx Field Descriptions Field Description 7 ENBL DMA Channel Enable. ENBL enables the DMA Channel 0 DMA channel is disabled. This mode is primarily used during configuration of the DMA Mux. The DMA has separate channel enables/disables, which should be used to disable or re-configure a DMA channel. 1 DMA channel is enabled 6 TRIG DMA Channel Trigger Enable (Channels 0–7 only). TRIG enables the periodic trigger capability for the DMA Channel 0 Triggering is disabled. If triggering is disabled, and the ENBL bit is set, the DMA Channel will simply route the specified source to the DMA channel. 1 Triggering is enabled 5–0 SOURCE DMA Channel Source. SOURCE specifies which DMA source, if any, is routed to a particular DMA channel, according to Table 27-5. Table 27-4. Channel and Trigger Enabling ENBL TRIG Function Mode 0 X DMA Channel is disabled Disabled Mode 1 0 DMA Channel is enabled with no triggering (transparent) Normal Mode 1 1 DMA Channel is enabled with triggering Periodic Trigger Mode Table 27-5. SOURCE Configuration Source Value IIC Transmit 0x01 IIC Receive 0x02 DSPI_A Transmit 0x03 DSPI_A Receive 0x04 DSPI_B Transmit 0x05 DSPI_B Receive 0x06 DSPI_C Transmit 0x23 DSPI_C Receive 0x24 ESCI_A Transmit 0x07 |
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