MAC7200 datasheet(623/976 Pages) FREESCALE

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MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

545

Chapter 29

Inter-Integrated Circuit Bus Controller Module (I2C_DMA)

29.1

Introduction

The Inter-Integrated Circuit (I2C™ or IIC) bus is a two-wire bidirectional serial bus that provides a simple

and efficient method of data exchange between devices. It minimizes the number of external connections

to devices and does not require an external address decoder.

This bus is suitable for applications requiring occasional communications over a short distance between a

number of devices. It also provides flexibility, allowing additional devices to be connected to the bus for

further expansion and system development.

The interface is designed to operate up to 100kbps with maximum bus loading and timing. The device is

capable of operating at higher baud rates, up to a maximum of module clock/20, with reduced bus loading.

The maximum communication length and the number of devices that can be connected are limited by a

maximum bus capacitance of 400pF.

The I2C module can be independently disabled by writing to the IBDIS bit in the module’s control register

(IBCR). Disabling the module will turn off the clock to the module, although the module’s registers remain

available to be accessed by the core across the peripheral bus. The IBDIS bit is intended to be used when

the module is not required in the application. Following a Reset operation the IBDIS bit is set, causing the

device to be disabled.

The I2C master on the MAC72xx provides a fast mode (400 kbits/s) interface for two scenarios:

•

Provide a bus interface to external EEPROM. In this scenario, the throughput of the interface will

be very low, typically only to load and store parameters and data at reset, or other special

conditions.

•

Provide a communications channel to off-chip peripherals, such as audio chips or other

radio-related peripherals. In this scenario, the throughput will be much higher, but the exact rate is

unknown.

29.1.1

Block Diagram

The block diagram of the I2C module is shown in Figure 29-1

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