MAC7200 datasheet(655/976 Pages) FREESCALE

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DSPI External Pins

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

577

•

Module Base Address: The address offset between the beginning of the DSPI module and the first

DSPI register (DSPI_MCR), referred to as DSPI_BASE, is set to $0000 for all DSPIs on the

MAC72xx.

•

The MAC7200 family provides the DSPI with a range of Chip Select lines depending on the

device. A maximum of six peripheral chip select lines can be provided from each of the on-board

DSPIs, offering selection of up to 64 external devices and transfer configurations. One of the Chip

Selects (CS[5]) can be used to provide a Chip Select Strobe in order to eliminate decoding glitches

generated when the Chip Selects change. This allows glitch free selection of up to 32 external

devices.

30.5

DSPI External Pins

Note that all chip select pins may not be available for all DSPIs on all device/package combinations.

30.6

DSPI Bus Aborts

The DSPI module supports Peripheral Bus bus aborts, and enforces the following memory map:

Supervisor Access: Unused

30.7

DSPI Differences from MAC71xx

•

Added CS6/CS7 (8 chip-selects total). Not all chip selects are bonded out on all device and/or

packages.

•

Number of CTARs (6) will not change

•

Added Double Baud Rate functionality

— Added DBR bit to each CTAR register

•

Fixed MUCts01474: Limitations of continuous chip select mode

Table 30-2. DSPI External Pins

SCK

Serial Clock

MOSI

Master Out/Slave In

MISO

Master In/Slave Out

CS0/SS

Chip Select 0/Slave Select

CS[4:1]

Chip Select

CS5/PCSS Chip Select/Chip Select Strobe

CS[7:6]

Chip Select

Table 30-3. DSPI Bus Aborts

Abort

Allowed

$0000-$00cf

$00d0-$3fff

MAC7200 Datasheet(PDF) 655 Page - Freescale Semiconductor, Inc

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