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External Signal Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

581

The block-specific modes are entered by host software writing to a register. The MCU-specific modes are

controlled by signals external to the DSPI. The MCU-specific modes are modes that the entire MCU may

enter, in parallel to the DSPI being in one of its block-specific modes.

30.9.4.1

Master Mode

Master Mode allows the DSPI to initiate and control serial communication. In this mode, the SCK signal

and the PCS[x] signals are controlled by the DSPI and configured as outputs.

30.9.4.2

Slave Mode

The Slave Mode allows the DSPI to communicate with SPI bus masters. In this mode the DSPI responds

to externally controlled serial transfers. The DSPI cannot control serial transfers in Slave Mode. In this

mode, the SCK signal and the PCS[0]/SS signal are configured as inputs and provided by a bus master.

30.9.4.3

Module Disable Mode

The Module Disable Mode is used for MCU power management. The clock to the non-memory mapped

logic in the DSPI can be stopped while in the Module Disable Mode. Logic external to the DSPI is needed

to fully implement the Module Disable Mode.

30.9.4.4

External Stop Mode

The External Stop Mode is used for MCU power management. When a request is made to enter External

Stop Mode, the DSPI block acknowledges the request and completes the transfer in progress. When the

DSPI reaches the frame boundary it signals that the system clocks to the DSPI block may be shut off.

30.9.4.5

Debug Mode

The Debug Mode is used for system development and debugging. If the SoC enters Debug Mode while

the FRZ bit in the DSPI_MCR is set, the DSPI stops all serial transfers. If the SoC enters Debug Mode

while the FRZ bit is negated, the DSPI behavior is unaffected and remains dictated by the block-specific

mode and configuration of the DSPI.

30.10 External Signal Description

30.10.1 Overview

Table 30-6 lists the signals that may connect off chip depending on SoC implementation.

Table 30-6. Signal Properties

Name

I/O Type

Function

Master Mode

Slave Mode

PCS[0]/SS

Output / Input

Peripheral Chip Select 0

Slave Select

PCS[1] - PCS[3]

Output

Peripheral Chip Select 1 - 3

Unused

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