MAC7200 datasheet(660/976 Pages) FREESCALE

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External Signal Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

582

Freescale Semiconductor

30.10.2 Detailed Signal Description

30.10.2.1 PCS[0]/SS — Peripheral Chip Select/Slave Select

In Master Mode, the PCS[0] signal is a Peripheral Chip Select output that selects which slave device the

current transmission is intended for.

In Slave Mode, the SS signal is a Slave Select input signal that allows a SPI master to select the DSPI as

the target for transmission.

30.10.2.2 PCS[1] - PCS[3] — Peripheral Chip Selects 1 - 3

PCS[1] - PCS[3] are Peripheral Chip Select output signals in Master Mode. In Slave Mode these signals

are not used.

30.10.2.3 PCS[4]/MTRIG — Peripheral Chip Select 4/Master Trigger

In Master Mode, PCS[4] is a Peripheral Chip Select output signal.

In Slave Mode, MTRIG is an output trigger signal that indicates that a change in data to be serialized has

occurred. The MTRIG pulse is four system clock cycles in duration. If the DSPI is in Slave Mode and the

MTO is disabled, the PCS[4]/MTRIG signal is unused.

30.10.2.4 PCS[5]/PCSS — Peripheral Chip Select 5/Peripheral Chip Select Strobe

PCS[5] is a Peripheral Chip Select output signal. When the DSPI is in Master Mode and PCSSE bit in the

DSPI_MCR is negated, this signal is used to select which slave device the current transfer is intended for.

PCSS provides a strobe signal that can be used with an external demultiplexer for deglitching of the PCS

signals. When the DSPI is in Master Mode and the PCSSE bit in the DSPI_MCR is set, the PCSS provides

the appropriate timing for the decoding of the PCS[0] - PCS[4] and PCS[6] - PCS[7] signals which

prevents glitches from occurring.

This signal is not used in Slave Mode.

PCS[4]/MTRIG

Output

Peripheral Chip Select 4

Master Trigger

PCS[5]/PCSS

Output

Peripheral Chip Select 5 /

Peripheral Chip Select Strobe

Unused

PCS[6] - PCS[7]

Output

Peripheral Chip Select 6- 7

Unused

SIN

Input

Serial Data In

SOUT

Output

Serial Data Out

SCK

Output / Input

Serial Clock (output)

Serial Clock (input)

Table 30-6. Signal Properties

Name

I/O Type

Function

Master Mode

Slave Mode

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