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MAC7200 Datasheet(PDF) 697 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 697 Page - Freescale Semiconductor, Inc |
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697 / 976 page ![]() Initialization/Application Information MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 619 30.13.2 Baud Rate Settings Table 30-31 shows the baud rate that is generated based on the combination of the baud rate prescaler PBR and the baud rate scaler BR in the DSPI_CTAR registers. The values calculated assume a 100 MHz system frequency and the double baud rate DBR bit is clear. 30.13.3 Delay Settings Table 30-32 shows the values for the Delay after Transfer (tDT) and CS to SCK Delay (tCSC) that can be generated based on the prescaler values and the scaler values set in the DSPI_CTAR registers. The values calculated assume a 100 MHz system frequency. Table 30-31. Baud Rate Values Baud Rate Divider Prescaler Values 235 7 2 25.0M 16.7M 10.0M 7.14M 4 12.5M 8.33M 5.00M 3.57M 6 8.33M 5.56M 3.33M 2.38M 8 6.25M 4.17M 2.50M 1.79M 16 3.12M 2.08M 1.25M 893k 32 1.56M 1.04M 625k 446k 64 781k 521k 312k 223k 128 391k 260k 156k 112k 256 195k 130k 78.1k 55.8k 512 97.7k 65.1k 39.1k 27.9k 1024 48.8k 32.6k 19.5k 14.0k 2048 24.4k 16.3k 9.77k 6.98k 4096 12.2k 8.14k 4.88k 3.49k 8192 6.10k 4.07k 2.44k 1.74k 16384 3.05k 2.04k 1.22k 872 32768 1.53k 1.02k 610 436 |
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