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MAC7200 Datasheet(PDF) 695 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 695 Page - Freescale Semiconductor, Inc

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Functional Description
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
617
Figure 30-24. Example of a DSPI in an SoC with a Power Management Block
30.12.8.1 External Stop Mode
When a request is made to enter External Stop Mode, the DSPI block acknowledges the request by
negating ipg_stop_ack. When the DSPI is ready to have its clocks shut off the ipg_stop_ack signal is
asserted. If a serial transfer is in progress, the DSPI waits until it reaches the frame boundary before it
asserts ipg_stop_ack. While the clocks are shut off, the DSPI memory-mapped logic is not accessible. The
states of the interrupt and DMA request signals cannot be changed while in External Stop Mode.
30.12.8.2 Module Disable Mode
Module Disable Mode is a block-specific mode that the DSPI can enter to save power. Host software can
initiate the Module Disable Mode by writing a ‘1’ to the MDIS bit in the DSPI_MCR. The Module Disable
Mode can also be initiated by hardware. A power management block can initiate Module Disable Mode
by asserting the ipg_doze signal while the DOZE bit in the DSPI_MCR is asserted.
When the MDIS bit is asserted or the ipg_doze signal is asserted while the DOZE bit is asserted, the DSPI
negates ipg_enable_clk at the next frame boundary. If implemented, the ipg_enable_clk signal can stop
the clock to the non-memory mapped logic. When ipg_enable_clk is negated, the DSPI is in a dormant
state, but the memory mapped registers are still accessible. Certain read or write operations have a different
affect when the DSPI is in the Module Disable Mode. Reading the RX FIFO Pop Register will not change
the state of the RX FIFO. Likewise, writing to the TX FIFO Push Register will not change the state of the
system clock
ipg_clk
ipg_stop
ipg_enable_clk
D Q
ips_module_en
ips_addr,
ips_byte_en,
ips_rwb,
ips_wdata
ipg_stop_ack
SoC Power
Management
ipg_clk_s
ipg_doze
Block
Non-Memory Mapped Area
Memory Mapped Area
DSPI
Frame Boundary
Detection
Logic
DOZE
MDIS
&
&
&
&
&
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