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MAC7200 Datasheet(PDF) 816 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 816 Page - Freescale Semiconductor, Inc |
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816 / 976 page ![]() ATD Implementation MAC7200 Microcontroller Family Reference Manual, Rev. 2 738 Freescale Semiconductor •2 μS minimum conversion time. • Internal sample and hold circuitry. • Pre-measurement discharge of internal Sample and Hold circuit possible for all channels. • Programmable input sample time for various source impedances. • Queued conversion sequences supported by DMA controller. • Analog inputs configurable as external sample triggers. • On-chip timer triggers for sampling. 33.3 ATD Implementation There are several scenarios for using the ATD on the MAC72xx: 1. A single channel is sampled multiple times, and the results averaged to produce a single reading 2. Multiple channels are continuously sampled (once per channel) 3. The processor switches between combinations of #1 and #2 based on external or internal stimulus. To support synchronized simultaneous sampling on the 32-channel MAC72xx device, we will have a two internal triggers (ETRIG) for the ATD. Each ATD will have the following trigger options: • No trigger • Trigger from ATD Channel xx • Trigger from ETRIG0 • Trigger from ETRIG1 NOTE What we are referring to above is the sample trigger, not the DMA trigger. 33.4 ATD External Pins 33.5 ATD Bus Aborts The ATD module supports Peripheral Bus bus aborts, and enforces the following memory map: Table 33-1. ATD External Pins Signal Description VRH Connected directly to the VRH pad. Used for external reference voltage (high). VRL Connected directly to the VRL pad. Used for external reference voltage (low). VDDA Connected directly to the VDDA pad. Used to power the ATD. VSSA Connected directly to the VSSA pad. Used to power the ATD. REFBYPC Connected directly to the REFBYPC pad. Used to filter noise from the VRH/VRL reference voltage to improve conversion results. AN00 - AN15 Connected directly to the PE[0:15] pads. Used as ATD channels or external sample triggers. The GPIO functionality on these pads is handled inside the PIM block. |
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