MAC7200 datasheet(817/976 Pages) FREESCALE

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ATD Differences from MAC71xx

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

739

Supervisor Access: Unused.

33.6

ATD Differences from MAC71xx

•

ATD runs directly from system (fast) clock (not programmable)

•

Fixed MUCts01643: Write on bus abort still writes the register

•

Added support for up to 32 channels on a single ATD

— Changed ETRIGCH field in the ATDETRIGCH register from 4 bits to 5 bits

— Changed CWCH field in the ATDCW register from 4 bits to 5 bits

— Changed RRCH field in the ATDRR register from 4 bits to 5 bits

•

Increased resolution for the ATD clock prescaler

— Changed PRES field in the ATDPRE register from 7 bits to 8 bits

•

Added Pre-discharge functionality

— Added the PRED bit in the ATDMODE register

•

Changed from 10

±1 bit@7μs to 12±3 bit@2μs accuracy

— Added the ATDCAL register for calibration

— Added the CWAR bit in the ATDCW register

— Added the RRAR bit in the ATDRR register

•

Added support for 8,10,11 and 12 bit conversions

— Replaced the CW8 bit with the CWNF[3:2] bits in the ATDCW register

— Replaced the RR8 bit with the RRNF[3:2] bits in the ATDRR register

•

Removed sample amplifier bypass functionality

— Removed the CWSB bit in the ATDCW register

— Removed the RRSB bit in the ATDRR register

•

Added Warp feature to increase ATD accuracy

— Added the WARP bit in the ATDMODE register

•

Added Command queue not full interrupt

— Added the CONFIE bit in the ATDINT register

— Added the CQNF bit in the ATDFLAG register

•

Changed interrupt clear in the ATDFLAG register from read register to write ’1’

Table 33-2. ATD Bus Aborts

Abort

Allowed

$0000-$0007

$0008-$000b

$000c-$0013

$0014-$0017 (READ only)

$0018-$3fff

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