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MAC7200 Datasheet(PDF) 815 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 815 Page - Freescale Semiconductor, Inc |
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815 / 976 page ![]() MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 737 Chapter 33 A/D Converter (ATD) 33.1 Introduction to the ATD on MAC7200 The MAC7200 family of devices has a single Analog to Digital Converter module (ATD_A), offering up to 16 analog input channels. The ATD module is connected to the eDMA controller in order to help access the conversion results and to define the conversions to be performed. Two DMA channels are connected to the ATD: One channel is used to move the conversion result out of the modules result register, and the other channel provides a conversion command word. The conversion command word is used to define parameters such as the mode of conversion, the channel to be converted and the length of the conversion. By defining a number of conversion words in the MCUs system memory, it is possible to build up a predefined sequence of conversions which will be executed without the intervention of the CPU. It is also possible for the CPU to write the conversion command word and to read the conversion results directly on the module without the need to use the DMA controller. The ATD module includes the ability to trigger a conversion sequence based on either an external signal, or by one of two internal signal lines, SYSTRG0 or SYSTRG1. In order to use an external trigger source to prompt a conversion, any one of the analog channels for the ATD can be used as the source for this off-chip trigger. The channel to be used must first be defined in the module External Trigger Channel register. This incoming trigger signal will be synchronized to the system clock which will introduce a delay of two system clock cycles before the conversion can be triggered. The internal trigger signal lines are connected to the devices Programmable Interrupt Timer (PIT) which provides two dedicated programmable 16-bit timers to trigger the Analog to Digital converter. The counter associated with the SYSTRG[x] lines can be programed with the desired conversion trigger duration. This counter will count down from this pre-loaded value to zero at the rate defined by the system frequency. Once at zero the trigger signal will be sent to the ATD and the counter will be reloaded. The ATD module can be disabled by writing to the MDIS bit in the modules ATDMODE register. Disabling the module will turn off the clock and shut down the analog circuits, although most of the module registers remain available to be accessed by the core across the peripheral bus. The MDIS bit is intended to be used when the module is not required in the application. By default the ATD is disabled after reset (MDIS=1), so prior to use, the MDIS bit must be cleared. See Section 33.8, “The DMADC1032 Module” for detailed information about the control and operation of the Analog to Digital Converter module. 33.2 ATD Features • Up to 16 analog input channels. • 12-bit resolution 9-bit accuracy. |
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