MAC7200 datasheet(824/976 Pages) FREESCALE

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Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

746

Freescale Semiconductor

NOTE

is specified in Chapter 9, “Device Memory Map”.

33.10.2 Register Descriptions

This section describes (in address order) all of the DMADC1032 registers and their individual bits. A

detailed register description starts with a figure that contains all bits of the register.

It consists of:

•

Bit: The exact bit number for the bit or field within the register

•

R: The value returned for the bit when a read operation on the register is executed

•

W: Describes whether or not the bit is writable

•

Reset: The value of the bit after reset

Those bits that are shaded out are read-only, meaning that writes to that bit will have no effect. If you want

to maintain maximum future compatibility, all unused bits should be masked out during any read/write

operations.

33.10.2.1 ATD Trigger Control Register (ATDTRIGCTL)

This register defines how the ATD uses both external and on-chip triggers. On those devices where the

on-chip triggers are available, this register can be used to configure which trigger (if any) is used to start

a conversion.

Base + 0x02

ATD Prescaler Register (ATDPRE)

R/W

Base + 0x03

ATD Operating Modes Register (ATDMODE)

R/W

Base + 0x04

ATD Calibration Register (ATDCAL)

8/16/32

R/W

Base + 0x08

ATD Predischarge Time Select Register (ATDPTS)

R/W

Base + 0x09 .. 0x0D

Reserved

—

Base + 0x0E

ATD Interrupt Register (ATDINT)

R/W

Base + 0x0F

ATD Flag Register (ATDFLAG)

R/W

D/A

Base + 0x10

ATD Command Word Register (ATDCW)

16/32

R/W

Base + 0x14

ATD Result Register (ATDRR)

8/16/32

1. U = User Mode, S = Supervisor Mode, D = Debug Mode, A = All (No restrictions), V = DFV Mode

Table 33-4. Module Memory Map (Continued)

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