MAC7200 datasheet(825/976 Pages) FREESCALE

825 / 976 page

Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

747

Table 33-6 shows the trigger sensitivity according to the TRIGP and TRIGLE bit.

NOTE

Writing to this register will stop the current conversion and discard the

command word in ATDCW. A DMA-request for fetching a command word

will be asserted. The DMA-request for saving a result will remain as it is. A

new conversion will start after a command word has been written to the

command register.

Address Base + 0x00

Access: User read/write

321

TRIGSEL

TRIGP

TRIGLE

Reset

000

Figure 33-2. ATD Trigger Control Register (ATDTRIGCTL)

Table 33-5. ATDTRIGCTL Field Descriptions

Field

Description

7–4

Reserved, should be cleared.

3–2

TRIGSEL

Trigger source select. Determines the trigger source. An external trigger will always be synchronized internally to the

system clock, resulting in a delay of 4 system clock cycles between the trigger and a conversion start. When using

SYSTRIG0 or SYSTRIG1, there is always a delay of 2 system clock cycles between the trigger and a conversion

start.

00 No external trigger used.

01 Use SYSTRIG0 (on-chip trigger) as trigger.

10 Use SYSTRIG1 (on-chip trigger) as trigger.

11 Use analog input channel (see ETRIGCH) as trigger.

Note: Avoid sampling a channel that is currently set as trigger pin. Otherwise, there will be an increased current

consumption on that pin.

TRIGP

Trigger polarity.

0 Trigger is low level/falling edge sensitive.

1 Trigger is high level/rising edge sensitive.

TRIGLE

Trigger is level/edge sensitive. Determines whether the trigger is edge or level sensitive. When the conversion mode

for the current command word is set to “wait for trigger”, the conversion starts only if the right trigger is asserted.

0 Trigger is edge sensitive

1 Trigger is level sensitive

Table 33-6. Trigger Sensitivity Selection Table

TRIGP

TRIGLE

Trigger Sensitivity

falling edge sensitive

low level sensitive

rising edge sensitive

high level sensitive

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