MAC7200 datasheet(852/976 Pages) FREESCALE

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Initialization/Application Information

MAC7200 Microcontroller Family Reference Manual, Rev. 2

774

Freescale Semiconductor

The ATD is idle until a command word is written to ATDCW. Then the ATD will start with the conversion.

It will check the command word and make it the current command. As predischarge is enabled in the

ATDMODE register the predischarge phase will start.

The ATD will close the switch Ssc to the pull-down resistor Rsc and therefore discharge the sample cap. It

will also enable the pull-down devices in the pad connected to the ATD channel which is selected by the

CWCH bits. For the next three ATD clock cycles the sample cap and the parasitic capacity will be

discharged.

Then the Sampling phase will started. Therefore the pull-down device in the pad and the pull-down resistor

at the sample cap will be disabled. The switch Smux will be closed to connect the current ATD channel with

the sample cap. The sample cap will be charged for the next four ATD clock cycles.

After this time the conversion phase will start. The switch Smux will be opened. The sample cap is now

connected with the RSD-conversion circuit only. The conversion will continue from this point as described

in e.g. Section 33.12.3.1, “Example 1: A Simple Conversion”.

33.12 Initialization/Application Information

In the following paragraphs, the initialization of the ATD module is shown. Some conversion examples

are also explained. The focus in these examples will remain on the CWCM bits.

33.12.1 Initialization

After reset, the ATD module is disabled. To enable the ATD the MDIS bit in the ATDMODE register must

be cleared. Once enabled, the ATD will wait, ready to receive command words before starting any

conversion. Due to the recovery time tREC of the analog conversion circuit, no conversion may be started

before tREC has elapsed

1. All conversions started within t

REC will produce unreliable results.

The following initialization sequence is recommended:

1. Enable ATD: Clear ATDMODE[MDIS]. Ensure tREC elapsed.

2. Set system clock division ratio: write ATDPRE

3. Set trigger:

— Select trigger source, polarity and sensitivity: write ATDTRIGCTL

— If trigger source is selected to be an analog input channel determine input channel number and

write it to ATDETRIGCH

4. Choose operating modes: write DOZE / DEBUG / PRED / WARP in ATDMODE

The steps #1 to #4 can be done with one single 32-bit write instead of four 8-bit writes.

5. Determine result adjustment constants (see Section 33.12.2, “ATD Calibration / Result

Adjustment).

6. Enable desired interrupt(s)

Now the ATD is initialized and ready to do conversions. To start conversions and receive results the

following options exist:

1. Refer to Appendix A, “Electrical Characteristics” for recovery time tREC

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