MAC7200 datasheet(853/976 Pages) FREESCALE

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Initialization/Application Information

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

775

7. Start conversions:

— Either program the DMA to write command words to ATDCW or

— manually write the command word sequence to ATDCW using ATDFLAG.CQNF as an

indicator for more command words needed

8. Get conversion results:

— Either program the DMA to read results from ATDRR or

— manually read the result sequence from ATDRR using ATDFLAG.CC as an indicator for the

end of a conversion

Please refer to 12.2, “The SPP DMA Controller Module (SPP_DMA2)” for further details about how to

use the DMA.

33.12.2 ATD Calibration / Result Adjustment

An ideal ATD transfer curve put into a coordinate system is linear, starting in the origin (no offset). It

reaches its maximum value 0xFFF (for 12-bit right justified conversions) at (VRH-VRL). The real device

behavior will differ slightly. Environment factors during chip production or chip operation (e.g.

temperature, voltage etc.) can have an influence.

As the ATD transfer curve is very linear the only two transfer curve factors that will vary are the slope

(gain) and the origin (offset). The ATD has the possibility to do a numerical adjustment of the transfer

curve: the gain and / or the offset of the raw conversion result can be adjusted by doing a multiply-and-add

operation via the MADD unit. This feature can be enabled/disabled on a command word level by setting

the ATDCW.CWAR bit. The adjustment of the raw conversion result is called a “result adjustment.”

This adjustment requires two factors: gain (GCC) and offset (OCC). The determination of these two

factors is called “calibration.” A calibration must be done each time when the chip operation factors are

changing in a way which that it affects the ATD accuracy. The calibration must not be done before each

conversion.

NOTE

Changing the gain and offset has no influence to the analog behavior.

In addition to the MADD unit, the warp-feature is available. This will influence the analog behavior of the

ATD. By setting this bit the gain is decreased by a fixed value to avoid that the maximum conversion result

of 0xFFF is already reached before VRH-VRL is reached (see Figure 33-23). Enabling the Warp-feature

will usually overcompensate an existing gain error and increase the offset. Therefore it is required to adjust

the GCC and OCC factors after warp has been enabled. How this is done is explained in Section 33.12.2.3,

“Steps Required For Calibration”. Refer to Section 33.10.2.4, “ATD Operating Modes Register

(ATDMODE),” for details about how to enable this feature.

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