MAC7200 datasheet(902/976 Pages) FREESCALE

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Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

824

Freescale Semiconductor

34.6.1.9

Pin Data Register (Port E)

NOTE

Because Port E implements only General Purpose Input (GPI) functionality,

the functionality of this register differs from the rest of the Ports. Careful

attention should be paid to the description of this register.

34.6.1.10 Global Interrupt Status Register

This register allows software to determine which ports currently have interrupts pending.

Table 34-27. PINDATAxx (Port A, B, C, D, F, G) Allowed Register Accesses

8-bit

16-bit

32-bit

READ

Allowed

WRITE

Allowed

Offset see Table 34-11

Access: see Table 34-29

321

DATA

Reset

000

Figure 34-11. Pin Data Register (PINDATAxx, Port E)

Table 34-28. PINDATAxx (Port E) Field Descriptions

Field

Description

7–1

Reserved, should be cleared.

DATA

1-bit Read Data Register. This 1-bit field provides a means to sample individual pins without the need for mask

and shift operations in software. Reading from this register is functionally equivalent to reading the

corresponding bit in the PORTIR register, but without the need to mask and shift the value. (i.e.-Reading from

PINDATA3 is equivalent to reading PORTIR, AND’ing the result with 0x0008, and shifting the result right by 3

places). See Section 34.8.2.2.2, “Driving/Sampling Individual Pins,” for examples using this feature.

Table 34-29. PINDATAxx (Port E) Allowed Register Accesses

8-bit

16-bit

32-bit

READ

Allowed

WRITE

Not Allowed 1

1. Functionality differs from other Ports.

Not Allowed 1

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