MAC7200 datasheet(903/976 Pages) FREESCALE

903 / 976 page

Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

825

34.6.1.11 PIM Configuration Register

This register allows software to disable or enable the external bus interface of the device.

Offset see Table 34-11

Access: see Table 34-31

987

6543210

0000

00000

INT_PENDING

Reset

0000

0000000

00000

Figure 34-12. Global Interrupt Status Register (GLBLINT)

Table 34-30. GLBLINT Field Descriptions

Field

Description

15–7

Reserved, should be cleared.

6–0

INT_PENDING

Interrupt Pending. These bits reflect any pending interrupts on Port A, B, C, D, F, E, G.

0 No interrupt is pending

1 Interrupt is pending

Table 34-31. GLBLINT Allowed Register Accesses

8-bit

16-bit

32-bit

READ

Allowed

Not Recommended

WRITE

Not Allowed

Offset see Table 34-11

Access: see Table 34-33

987

6543210

0000

0000000

Reset

0000

0000000

000

1/01

1 The reset value of EIMCLKEN depends on the Chip Mode of the system. If the system is placed into a mode where

booting is done from the external bus, the reset value will be ’1’. Otherwise, the reset value will be ’0’.

Figure 34-13. PIM Configuration Register (PICONFIG)

Bit

Port

Bit

Port

0Port A4Port E

1Port B5

Port F

Port C

Port G

3Port D

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