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External Bus (FlexBus) Timing Specifications

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

881

A.15

External Bus (FlexBus) Timing Specifications

A multi-function external bus interface called FlexBus is provided on the MAC72xx with basic

functionality to interface to slave-only devices up to a maximum bus frequency of 35 MHz. It can be

directly connected to asynchronous or synchronous devices such as external boot ROMs, flash memories,

gate-array logic, or other simple target (slave) devices with little or no additional circuitry. For

asynchronous devices, a simple chip-select based interface can be used. The FlexBus interface has three

general purpose chip-selects (CS[2:0]). Chip-select CS0 can be dedicated to boot ROM access and can be

programmed to be byte (8 bits) or half-word (16 bits) wide. Control signal timing is compatible with

common ROM / flash memories.

A.15.1

FlexBus Inputs

Table A-27 lists external bus input timings, which are shown in Figure A-10, Figure A-11 and

Figure A-12.

NOTE

All external bus timings are synchronous; that is, input setup/hold and

output delay with respect to the rising edge of a reference clock. The

reference clock is the CLKOUT output. It has the same duty cycle as the

Peripheral Bus Clock.

All other timing relationships can be derived from these values.

Figure A-10. External Bus Input Timing Specifications

Table A-27. External Bus Input Timing Specifications

Num

Rating1

1. Timing specifications have been indicated taking into account the full slew rate for the pads.

Symbol

Min

Typ

Max

Unit

D CLKOUT

tCYC

—

4000

Control Inputs

U2a

D Control input valid to CLKOUT high2

2. The TA pin is the only control input on MAC7200 family devices.

tCVCH

—

U3a

D CLKOUT high to control inputs invalid 2

tCHCII

0—

—

Data Inputs

D Data input (DATA[15:0]) valid to CLKOUT high

tDIVCH

—

D CLKOUT high to data input (DATA[15:0]) invalid

tCHDII

0—

—

CLKOUT

DATA[n:0]

2.5V

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