MAC7200 datasheet(960/976 Pages) FREESCALE

960 / 976 page

External Bus (FlexBus) Timing Specifications

MAC7200 Microcontroller Family Reference Manual, Rev. 2

882

Freescale Semiconductor

A.15.2

FlexBus Outputs

Table A-28 lists external bus output timings. Read/write bus timings listed in Table A-28 are shown in

Figure A-11 and Figure A-12.

Table A-28. External Bus Output Timing Specifications

Num

Rating

Symbol

Min

Max

Unit

Control Outputs

U6a

D CLKOUT high to chip selects valid 1

1. CSn transitions after the falling edge of CLKOUT.

tCHCV

—8

U6b

D CLKOUT high to byte select (BS[1:0]) valid2

2. BSn transitions after the falling edge of CLKOUT.

tCHBV

—8

U6c

D CLKOUT high to output select (OE) valid3

3. OE transitions after the falling edge of CLKOUT.

tCHOV

—8

U6d

D CLKOUT high to output select (TBST) valid4

4. TBST transitions after the falling edge of CLKOUT.

tCHOV

—8

U7a

D CLKOUT high to control output (BS[1:0], OE) invalid

tCHCOI

0—

U7b

D CLKOUT high to chip selects invalid

tCHCI

0—

Address and Attribute Outputs

D CLKOUT high to address (ADDR[21:0]) and control

(R/W) valid

tCHAV

—8

D CLKOUT high to address (ADDR[21:0]) and control

(R/W) invalid

tCHAI

0—

Data Outputs

U10

D CLKOUT high to data output (DATA[15:0]) valid

tCHDOV

—8

U11

D CLKOUT high to data output (DATA[15:0]) invalid

tCHDOI

0—

U12

D CLKOUT high to data output (DATA[15:0]) high

impedance

tCHDOZ

—9

MAC7200 Datasheet(PDF) 960 Page - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 960 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL