LPC1850 datasheet(22/84 Pages) NXP

22 / 84 page

LPC1850_30_20_10

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Objective data sheet

Rev. 1 — 3 January 2011

22 of 84

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

PD_5[2]

<tbd>

n.c.

CTOUT_9 — SCT output 9. Match output 1 of timer 2.

I/O

EXTBUS_D19 — External memory data line 19.

-n.c.

PD_6[2]

<tbd>

n.c.

CTOUT_10 — SCT output 10. Match output 2 of timer 2.

I/O

EXTBUS_D20 — External memory data line 20.

-n.c.

PD_7[2]

<tbd>

n.c.

CTIN_5 — SCT input 5. Capture input 2 of timer 2.

I/O

EXTBUS_D21 — External memory data line 21.

-n.c.

PD_8[2]

<tbd>

n.c.

CTIN_6 — SCT input 6. Capture input 1 of timer 3.

I/O

EXTBUS_D22 — External memory data line 22.

-n.c.

PD_9[2]

T11

<tbd>

n.c.

CTOUT_13 — SCT output 13. Match output 1 of timer 3.

I/O

EXTBUS_D23 — External memory data line 23.

-n.c.

PD_10[2]

P11

<tbd>

n.c.

CTIN_1 — SCT input 1. Capture input 1 of timer 0. Capture input 1 of timer 2.

EXTBUS_BLS3 — LOW active Byte Lane select signal 3.

-n.c.

PD_11[2]

<tbd>

n.c.

-n.c.

EXTBUS_CS3 — LOW active Chip Select 3 signal.

-n.c.

PD_12[2]

N11

<tbd>

n.c.

-n.c.

EXTBUS_CS2 — LOW active Chip Select 2 signal.

-n.c.

PD_13[2]

T14

<tbd>

n.c.

CTIN_0 — SCT input 0. Capture input 0 of timer 0, 1, 2, 3.

EXTBUS_BLS2 — LOW active Byte Lane select signal 2.

-n.c.

Table 3.

Pin description …continued

Symbol

Reset

state

[1]

Type Description

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