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LPC1850 Datasheet(PDF) 12 Page - NXP Semiconductors

Part # LPC1850
Description  32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD
PDF  84 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC1850 Datasheet(HTML) 12 Page - NXP Semiconductors

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LPC1850_30_20_10
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 3 January 2011
12 of 84
NXP Semiconductors
LPC1850/30/20/10
32-bit ARM Cortex-M3 microcontroller
P3_8[2]
C10
<tbd>
-
n.c.
-n.c.
I/O
SSP0_MOSI — Master Out Slave in for SSP0.
I/O
SPIFI_CS — SPIFI serial flash chip select.
P4_0[2]
D5
I; PU
I/O
GPIO2[0] — General purpose digital input/output pin.
O
MCOA0 — Motor control PWM channel 0, output A.
I
NMI — External interrupt input to NMI.
-n.c.
P4_1[2]
A1
I; PU
I/O
GPIO2[1] — General purpose digital input/output pin.
O
CTOUT_1 — SCT output 1. Match output 1 of timer 0.
O
LCDVD0 — LCD data.
-n.c.
P4_2[2]
D3
I; PU
I/O
GPIO2[2] — General purpose digital input/output pin.
O
CTOUT_0 — SCT output 0. Match output 0 of timer 0.
O
LCDVD3 — LCD data.
-n.c.
P4_3[2]
C2
I; PU
I/O
GPIO2[3] — General purpose digital input/output pin.
O
CTOUT_3 — SCT output 0. Match output 3 of timer 0.
O
LCDVD2 — LCD data.
-n.c.
P4_4[2]
B1
I; PU
I/O
GPIO2[4] — General purpose digital input/output pin.
O
CTOUT_2 — SCT output 2. Match output 2 of timer 0.
O
LCDVD1 — LCD data.
-n.c.
P4_5[2]
D2
I; PU
I/O
GPIO2[5] — General purpose digital input/output pin.
O
CTOUT_5 — SCT output 5. Match output 1 of timer 1.
O
LCDFP — Frame pulse (STN). Vertical synchronization pulse (TFT).
-n.c.
P4_6[2]
C1
I; PU
I/O
GPIO2[6] — General purpose digital input/output pin.
O
CTOUT_4 — SCT output 4. Match output 0 of timer 1.
O
LCDENAB/LCDM — STN AC bias drive or TFT data enable input.
-n.c.
P4_7[2]
H4
<tbd>
O
LCDDCLK — LCD panel clock.
I
GP_CLKIN — General purpose clock input to the CGU.
-n.c.
-n.c.
Table 3.
Pin description …continued
Symbol
Reset
state
[1]
Type Description



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