LPC1850 datasheet(40/84 Pages) NXP

40 / 84 page

LPC1850_30_20_10

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Objective data sheet

Rev. 1 — 3 January 2011

40 of 84

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

• Controller supports 2048 (A0 to A10), 4096 (A0 to A11), and 8192 (A0 to A12) row

address synchronous memory parts. That is typical 512 MB, 256 MB, and 128 MB

parts, with 4, 8, 16, or 32 data bits per device.

• Separate reset domains allow the for auto-refresh through a chip reset if desired.

Note: Synchronous static memory devices (synchronous burst mode) are not supported.

7.12.6 High-speed USB Host/Device/OTG interface (USB0)

Remark: USB0 is not available on the LPC1810 (see Table 2).

The USB OTG module allows the part to connect directly to a USB host such as a PC (in

device mode) or to a USB device in host mode.

7.12.6.1

Features

• Complies with Universal Serial Bus specification 2.0.

• Complies with USB On-The-Go supplement.

• Complies with Enhanced Host Controller Interface Specification.

• Supports auto USB 2.0 mode discovery.

• Supports all high-speed USB-compliant peripherals.

• Supports all full-speed USB-compliant peripherals.

• Supports software Host Negotiation Protocol (HNP) and Session Request Protocol

(SRP) for OTG peripherals.

• Contains UTMI+ compliant transceiver (PHY).

• Supports interrupts.

• This module has its own, integrated DMA engine.

7.12.7 High-speed USB Host/Device interface with ULPI (USB1)

Remark: USB1 is not available on the LPC1820/10 (see Table 2).

The USB1 interface can operate as a full-speed USB host/device interface or can connect

to an external ULPI PHY for High-speed operation.

7.12.7.1

Features

• Complies with Universal Serial Bus specification 2.0.

• Complies with Enhanced Host Controller Interface Specification.

• Supports auto USB 2.0 mode discovery.

• Supports all high-speed USB-compliant peripherals if connected to external ULPI

PHY.

• Supports all full-speed USB-compliant peripherals.

• Supports interrupts.

• This module has its own, integrated DMA engine.

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