LPC1850 datasheet(55/84 Pages) NXP

55 / 84 page

LPC1850_30_20_10

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 1 — 3 January 2011

55 of 84

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

[1]

Typical ratings are not guaranteed. The values listed are at room temperature (25

°C), nominal supply voltages.

[2]

The RTC typically fails when VVBAT drops below 1.6 V.

[3]

VDD(REG)(3V3) = 3.3 V; Tamb =25 °C for all power consumption measurements.

[4]

Conditions <tbd>.

[5]

On pin VBAT; IDD(REG)(3V3) = <tbd> nA; VDD(REG)(3V3) = 3.3 V; VBAT < VDD(REG)(3V3); Tamb =25 °C.

[6]

On pin VBAT; VBAT = 3.3 V; Tamb =25 °C.

[7]

All internal pull-ups disabled. All pins configured as output and driven LOW. VDD(3V3) = 3.3 V; Tamb =25 °C.

[8]

VDDA(3V3) = 3.3 V; Tamb =25 °C.

[9]

Including voltage on outputs in 3-state mode.

[10] VDD(3V3) supply voltages must be present.

[11] 3-state outputs go into 3-state mode in Deep power-down mode.

[12] Allowed as long as the current limit does not exceed the maximum current allowed by the device.

[13] To VSS.

Oscillator pins

Vi(XTAL1)

input voltage on pin

XTAL1

−0.5

1.2

Vo(XTAL2)

output voltage on pin

XTAL2

−0.5

1.2

USB pins

VIC

common-mode input

voltage

high-speed mode

<tbd>

full-speed/low-speed

mode

<tbd>

chirp mode

<tbd>

Vi(dif)

differential input voltage

<tbd>

Table 8.

Static characteristics …continued

Tamb = −40 °C to +85 °C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

LPC1850 Datasheet(PDF) 55 Page - NXP Semiconductors

LPC1850 Datasheet(HTML) 55 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

Datasheet Download

Link URL