LPC1850 datasheet(67/84 Pages) NXP

67 / 84 page

LPC1850_30_20_10

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Objective data sheet

Rev. 1 — 3 January 2011

67 of 84

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

11.5 USB interface

[1]

Characterized but not implemented as production test. Guaranteed by design.

Table 14.

Dynamic characteristics: USB pins (full-speed)

CL = 50 pF; Rpu = 1.5 kΩ on D+ to VDD(IO), unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

rise time

10 % to 90 %

<tbd>

fall time

10 % to 90 %

<tbd>

tFRFM

differential rise and fall time

matching

tr /tf

<tbd>

VCRS

output signal crossover voltage

<tbd>

tFEOPT

source SE0 interval of EOP

see Figure 21

<tbd>

tFDEOP

source jitter for differential transition

to SE0 transition

see Figure 21

<tbd>

tJR1

receiver jitter to next transition

<tbd>

tJR2

receiver jitter for paired transitions

10 % to 90 %

<tbd>

tEOPR1

EOP width at receiver

must reject as

EOP; see

Figure 21

[1] <tbd>

--ns

tEOPR2

EOP width at receiver

must accept as

EOP; see

Figure 21

[1] <tbd>

--ns

Fig 21. Differential data-to-EOP transition skew and EOP width

002aab561

TPERIOD

differential

data lines

crossover point

source EOP width: tFEOPT

receiver EOP width: tEOPR1, tEOPR2

crossover point

extended

differential data to

SE0/EOP skew

× TPERIOD + tFDEOP

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