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LPC4370 Datasheet(PDF) 123 Page - NXP Semiconductors

Part # LPC4370
Description  32-bit ARM Cortex-M4 2 x M0 MCU 282 kB SRAM Ethernet two HS USBs 80 Msps 12-bit ADC configurable peripherals
PDF  150 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC4370 Datasheet(HTML) 123 Page - NXP Semiconductors

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LPC4370
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 21 October 2013
123 of 150
NXP Semiconductors
LPC4370
32-bit ARM Cortex-M4/M0 microcontroller
11.17 SD/MMC
11.18 LCD
Table 32.
Dynamic characteristics: SD/MMC
Tamb = 40 C to 85 C, 2.2 V VDD(REG)(3V3) 3.6 V; 2.7 V VDD(IO) 3.6 V, CL = 20 pF. Simulated
values. SAMPLE_DELAY = 0x8, DRV_DELAY = 0xF in the SDDELAY register (see the LPC18xx
user manual UM10430).
Symbol
Parameter
Conditions
Min
Max
Unit
fclk
clock frequency
on pin SD_CLK; data transfer mode
52
MHz
tr
rise time
0.5
2
ns
tf
fall time
0.5
2
ns
tsu(D)
data input set-up time
on pins SD_DATn as inputs
6
-
ns
on pins SD_CMD as inputs
7
-
ns
th(D)
data input hold time
on pins SD_DATn as inputs
-1
-
ns
on pins SD_CMD as inputs
1ns
td(QV)
data output valid delay
time
on pins SD_DATn as outputs
-
17
ns
on pins SD_CMD as outputs
-
18
ns
th(Q)
data output hold time
on pins SD_DATn as outputs
4
-
ns
on pins SD_CMD as outputs
4
-
ns
Fig 36. SD/MMC timing
002aag204
SD_CLK
SD_DATn (O)
SD_DATn (I)
td(QV)
th(D)
tsu(D)
Tcy(clk)
th(Q)
SD_CMD (O)
SD_CMD (I)
Table 33.
Dynamic characteristics: LCD
Tamb =25 C; 2.2 V VDD(REG)(3V3) 3.6 V; 2.7 V VDD(IO) 3.6 V; CL = 20 pF. Simulated values.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fclk
clock frequency
on pin LCD_DCLK
-
50
-
MHz
td(QV)
data output valid
delay time
-17
ns
th(Q)
data output hold time
8.5
-
ns



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