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LPC4370 Datasheet(PDF) 120 Page - NXP Semiconductors |
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LPC4370 Datasheet(HTML) 120 Page - NXP Semiconductors |
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120 / 150 page ![]() LPC4370 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 2 — 21 October 2013 120 of 150 NXP Semiconductors LPC4370 32-bit ARM Cortex-M4/M0 microcontroller 11.15 USB interface [1] Characterized but not implemented as production test. Guaranteed by design. Table 29. Dynamic characteristics: USB0 and USB1 pins (full-speed) CL = 50 pF; Rpu = 1.5 k on D+ to VDD(IO); 3.0 V VDD(IO) 3.6 V. Symbol Parameter Conditions Min Typ Max Unit tr rise time 10 % to 90 % 8.5 - 13.8 ns tf fall time 10 % to 90 % 7.7 - 13.7 ns tFRFM differential rise and fall time matching tr /tf -- 109 % VCRS output signal crossover voltage 1.3 - 2.0 V tFEOPT source SE0 interval of EOP see Figure 34 160 - 175 ns tFDEOP source jitter for differential transition to SE0 transition see Figure 34 2- +5 ns tJR1 receiver jitter to next transition 18.5 - +18.5 ns tJR2 receiver jitter for paired transitions 10 % to 90 % 9- +9 ns tEOPR1 EOP width at receiver must reject as EOP; see Figure 34 [1] 40 --ns tEOPR2 EOP width at receiver must accept as EOP; see Figure 34 [1] 82 --ns Fig 34. Differential data-to-EOP transition skew and EOP width 002aab561 TPERIOD differential data lines crossover point source EOP width: tFEOPT receiver EOP width: tEOPR1, tEOPR2 crossover point extended differential data to SE0/EOP skew n × TPERIOD + tFDEOP |
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