PCF8537 datasheet(44/82 Pages) NXP

44 / 82 page

PCF8537

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Product data sheet

Rev. 1 — 31 May 2012

44 of 82

NXP Semiconductors

PCF8537

Industrial LCD driver for multiplex rates up to 1:8

8.6 Display controller

The display controller executes the commands identified by the command decoder. It

contains the status registers of the PCF8537 and co-ordinates their effects. The controller

is also responsible for loading display data into the display RAM as required by the filling

order.

8.7 Display register

The display register holds the display data while the corresponding multiplex signals are

generated.

8.8 Display RAM

The display RAM stores LCD data. Depending on the multiplex drive mode, the

arrangement of the RAM is changed.

• multiplex drive mode 1:8: RAM is 44  8bit

• multiplex drive mode 1:6: RAM is 46  6bit

• multiplex drive mode 1:4: RAM is 44  4 bit arranged in two banks

• multiplex drive mode 1:2: RAM is 44  2 bit arranged in two banks

• static drive mode: RAM is 44  1 bit arranged in two banks

A logic 1 in the RAM bit map indicates the on-state of the corresponding LCD element;

similarly, a logic 0 indicates the off-state.

There is a one-to-one correspondence between

• the bits in the RAM bitmap and the LCD elements,

• the RAM columns and the segment outputs,

• the RAM rows and the backplane outputs.

PCF8537 Datasheet(PDF) 44 Page - NXP Semiconductors