PCF8537 datasheet(80/82 Pages) NXP

80 / 82 page

PCF8537

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Product data sheet

Rev. 1 — 31 May 2012

80 of 82

NXP Semiconductors

PCF8537

Industrial LCD driver for multiplex rates up to 1:8

23. Figures

Fig 1.

Block diagram of PCF8537AH . . . . . . . . . . . . . . . .3

Fig 2.

Block diagram of PCF8537BH . . . . . . . . . . . . . . . .4

Fig 3.

Pin configuration for TQFP64 (PCF8537AH). . . . .5

Fig 4.

Pin configuration for TQFP64 (PCF8537BH). . . . .5

Fig 5.

Recommended start-up sequence when using

the internal charge pump and the internal clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

Fig 6.

Recommended start-up sequence when using

an external supplied VLCD and the internal clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

Fig 7.

Recommended start-up sequence when using the

internal charge pump and an external clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

Fig 8.

Recommended start-up sequence when using

an external supplied VLCD and an external

clock signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Fig 9.

Recommended power-down sequence for

minimum power-down current when using the

internal charge pump and the internal clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Fig 10. Recommended power-down sequence when

using an external supplied VLCD and the internal

clock signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Fig 11. Recommended power-down sequence when

using the internal charge pump and an external

clock signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Fig 12. Recommended power-down sequence for

minimum power-down current when using an

external supplied VLCD and an external clock

signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

Fig 13. Example of displays suitable for PCF8537 . . . . .23

Fig 14. Typical I2C system configuration when using

the internal VLCD generation . . . . . . . . . . . . . . . .24

Fig 15. Typical SPI system configuration when using

an external VLCD . . . . . . . . . . . . . . . . . . . . . . . . .24

Fig 16. VLCD generation including temperature

compensation . . . . . . . . . . . . . . . . . . . . . . . . . . .25

Fig 17. VLCD programming of PCF8537 (assuming

VT[7:0] = 0h) . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

Fig 18. Charge pump driving capability with

VDD2 = 3.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Fig 19. Charge pump driving capability with

VDD2 = 5.0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . .28

Fig 20. Temperature measurement block with digital

temperature filter . . . . . . . . . . . . . . . . . . . . . . . . .29

Fig 21. Temperature measurement delay during

ramping up-down of the environment

temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

Fig 22. Example of segmented temperature coefficients.30

Fig 23. Electro-optical characteristic: relative

transmission curve of the liquid . . . . . . . . . . . . . .33

Fig 24. Static drive mode waveforms (line inversion

mode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

Fig 25. Waveforms for the 1:2 multiplex drive mode

with 1⁄2 bias (line inversion mode) . . . . . . . . . . . .35

Fig 26. Waveforms for the 1:2 multiplex drive mode

with 1⁄3 bias (line inversion mode) . . . . . . . . . . . . 36

Fig 27. Waveforms for the 1:4 multiplex drive mode

with 1⁄3 bias (line inversion mode) . . . . . . . . . . . . 37

Fig 28. Waveforms for 1:6 multiplex drive mode

with 1⁄3 bias (line inversion mode) . . . . . . . . . . . . 38

Fig 29. Waveforms for 1:6 multiplex drive mode

with 1⁄4 bias (line inversion mode) . . . . . . . . . . . . 39

Fig 30. Waveforms for 1:8 multiplex drive mode

with 1⁄4 bias (line inversion mode) . . . . . . . . . . . . 40

Fig 31. Waveforms for 1:8 multiplex drive mode

with 1⁄4 bias (frame inversion mode) . . . . . . . . . . 41

Fig 32. Display RAM bitmap . . . . . . . . . . . . . . . . . . . . . . 45

Fig 33. Display RAM filling order in static drive mode . . . 47

Fig 34. Discarded bits at the end of data transmission . . 47

Fig 35. Display RAM filling order in 1:2 multiplex drive

mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Fig 36. Display RAM filling order in 1:4 multiplex drive

mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Fig 37. Display RAM filling order in 1:6 multiplex drive

mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Fig 38. Display RAM filling order in 1:8 multiplex drive

mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Fig 39. Bank selection. . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Fig 40. Example of the Bank-select command with

multiplex drive mode 1:4 . . . . . . . . . . . . . . . . . . . 50

Fig 41. Control byte format . . . . . . . . . . . . . . . . . . . . . . . 52

Fig 42. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Fig 43. Definition of START and STOP conditions . . . . . 53

Fig 44. System configuration. . . . . . . . . . . . . . . . . . . . . . 54

Fig 45. Acknowledgement on the I2C-bus. . . . . . . . . . . . 54

Fig 46. I2C-bus protocol, write mode. . . . . . . . . . . . . . . . 56

Fig 47. I2C-bus protocol, read mode . . . . . . . . . . . . . . . . 56

Fig 48. Data transfer overview . . . . . . . . . . . . . . . . . . . . 57

Fig 49. SPI-bus write example . . . . . . . . . . . . . . . . . . . . 58

Fig 50. SPI-bus write example . . . . . . . . . . . . . . . . . . . . 58

Fig 51. SPI-bus read example. . . . . . . . . . . . . . . . . . . . . 59

Fig 52. Device protection diagram for PCF8537AH . . . . 60

Fig 53. Device protection diagram for PCF8537BH . . . . 60

Fig 54. LCD voltage variation with respect to

temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Fig 55. Typical IDD1 with respect to temperature . . . . . . . 65

Fig 56. Typical IDD2 with respect to temperature . . . . . . . 65

Fig 57. Typical IDD(LCD) with respect to temperature . . . . 66

Fig 58. Driver timing waveforms . . . . . . . . . . . . . . . . . . . 67

Fig 59. RESET timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Fig 60. I2C-bus timing waveforms . . . . . . . . . . . . . . . . . . 68

Fig 61. SPI-bus timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Fig 62. Package outline SOT357-1 (TQFP64) . . . . . . . . 70

Fig 63. Temperature profiles for large and small

components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

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