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AM8530 Datasheet(PDF) 87 Page - Advanced Micro Devices |
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AM8530 Datasheet(HTML) 87 Page - Advanced Micro Devices |
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87 / 194 page  Data Communication Modes Functional Description AMD 4–35 cient transitions to allow self-clocking devices to remain in sync. Under these conditions the equipment in use today will send sync characters in order to maintain character phase. In this case the receiver may want to recognize these characters and delete them from the receive data. This function is available in the SCC by setting the Sync Character Load Inhibit bit (D1) in WR3 to ‘1’. While this bit is set to ‘1’, the character about to be loaded into the receive Data FIFO will be compared with the contents of WR6. If all eight bits match the character, it is not loaded into the FIFO. Because the comparison is across eight bits, this function works correctly only when the number of bits per character is the same as the sync character length. Thus it cannot be used with 12- or 16-bit sync char- acters. Both leading sync characters and sync characters embedded in the data will be properly removed in the case of an 8-bit sync character, but only the leading sync characters may be properly removed in the case of a 6-bit sync character. Care must be exercised in us- ing this feature because sync characters not transferred to the receive Data FIFO will automatically be excluded from CRC calculation. This works properly only in the 8-bit case. D7 D6 D5 D4 D3 D2 D1 D0 SYNC7 SYNC1 SYNC7 SYNC3 ADR7 ADR7 SYNC6 SYNC0 SYNC6 SYNC2 ADR6 ADR6 SYNC5 SYNC5 SYNC5 SYNC1 ADR5 ADR5 SYNC4 SYNC4 SYNC4 SYNC0 ADR4 ADR4 SYNC3 SYNC3 SYNC3 1 ADR3 X SYNC2 SYNC2 SYNC2 1 ADR2 X SYNC1 SYNC1 SYNC1 1 ADR1 X SYNC0 SYNC0 SYNC0 1 ADR0 X MONOSYNC, 8 BITS MONOSYNC, 6 BITS BISYNC, 16 BITS BISYNC, 12 BITS SDLC SDLC (ADDRESS RANGE) D7 D6 D5 D4 D3 D2 D1 D0 SYNC7 SYNC5 SYNC15 SYNC11 0 SYNC6 SYNC4 SYNC14 SYNC10 1 SYNC5 SYNC3 SYNC13 SYNC9 1 SYNC4 SYNC2 SYNC12 SYNC8 1 SYNC3 SYNC1 SYNC11 SYNC7 1 SYNC2 SYNC0 SYNC10 SYNC6 1 SYNC1 X SYNC9 SYNC5 1 SYNC0 X SYNC8 SYNC4 0 MONOSYNC, 8 BITS MONOSYNC, 6 BITS BISYNC, 16 BITS BISYNC, 12 BITS SDLC Figure 4–23. SYNC Character Programming |
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