AM8530 datasheet(18/194 Pages) AMD

18 / 194 page

General Information

AMD

1–10

these outputs are active each time a sync character is recognized (regardless of charac-

ter boundaries). In SDLC mode, these pins act as outputs and are valid on receipt of a

flag.

TRxCA, TRxCB — Transmit/Receive Clocks (inputs or outputs, active Low)

The functions of these pins are under program control.

TRxC may supply the receive

clock or the transmit clock in the Input mode or supply the output of the digital phase-

locked loop, the crystal oscillator, the baud rate generator, or the transmit clock in the out-

put mode. If a clock is supplied on these pins in NRZI or NRZ mode serial data on the

TxD pin will be clocked out on the negative edge of these pins. In FM mode, TxD is

clocked on both clock edges.

TxDA, TxDB — Transmit Data (outputs, active High)

Serial data from the SCC is sent out these pins.

W/REQA, W/REQB — Wait/Request (outputs, open drain and switches from floating

to Low when programmed for Wait function, driven from High to Low when pro-

grammed for a Request function)

These dual-purpose outputs can be programmed as either transmit or receive request

lines for a DMA controller, or as Wait lines to synchronize the CPU to the SCC data rate.

The reset state is Wait.

AM8530 Datasheet(PDF) 18 Page - Advanced Micro Devices