AM8530 datasheet(14/194 Pages) AMD

14 / 194 page

General Information

AMD

1–6

1.4

Pin Functions

The SCC pins are divided into seven functional groups: Address/Data, Bus Timing and

Reset, Device Control, Interrupt, Serial Data (both channels), Peripheral Control (both

channels), and Clocks (both Channels). Figures 1–3 and 1–4 show the pins in each func-

tional group for the 40- and 44-pin SCC versions.

The Address/Data group consists of the bidirectional lines used to transfer data between

the CPU and the SCC. The direction of these lines depends on whether the SCC is se-

lected and whether the operation is a Read or a Write.

The Timing and Control groups designate the type of transaction to occur and when this

transaction will occur. The Interrupt group provides inputs and outputs to conform to the

Z-Bus specifications for handling and prioritizing interrupts. The remaining groups are di-

vided into Channel A and Channel B groups for serial data (transmit or receive), peripher-

al control (such as DMA or Modem), and the input and output lines for the receive and

transmit clocks.

10216A-004A

IEO

RxDA

TxDA

INT

INTACK

W/REQA

SYNCA

RTxCA

TRxCA

RTSA

CTSA

DCDA

RxDB

TxDB

W/REQB

SYNCB

DTR/REQB

RTSB

CTSB

DCDB

IEI

+5 V

PCLK

GND

Bus

Timing

and Reset

Control

Interrupt

Channel

Clocks

Channel

Controls

for Modem,

DMA, or

Other

Serial

Data

Serial

Data

Channel

Clocks

RTxCB

TRxCB

DTR/REQA

Channel

Controls

for Modem,

DMA, or

Other

Am85C30/

Am8530H

SCC

Data

Bus

D0- D7

Figure 1–3. SCC Pin Functions

AM8530 Datasheet(PDF) 14 Page - Advanced Micro Devices

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