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UM0434 Datasheet(PDF) 223 Page - STMicroelectronics |
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UM0434 Datasheet(HTML) 223 Page - STMicroelectronics |
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223 / 390 page ![]() Instruction pipeline and execution timing UM0434 224/391 lwzux 1 None Aligned lwzx 1 None Aligned mbar 1 Completion Plus additional synchronization time mcrf, e_mcrf 1None mcrxr 1 Completion mfcr 1None mfmsr 1None mfspr (except, debug, MMU), se_mfctr, se_mflr 1None mfspr, (debug, MMU) 3 Completion Plus additional synchronization time msync 1 Completion Plus additional synchronization time mtcrf 2None mtmsr 2 Completion Plus additional synchronization time mtspr, (debug, MMU), se_mtctr, se_mtlr 2 Completion Plus additional synchronization time mtspr, (except, debug, MMU) 1 None mulhwu[.] 1None mulhw[.] 1None mulli, e_mulli, e_mull2i 1None mullw[o][.], se_mullw 1None nand[.] 1None neg[o][.], se_neg 1None nop, (ori, r0r00) 1None nor[.], e_ori[.], e_or2i, e_or2is 1None orc[.] 1None ori 1None oris 1None or[.], se_or 1None rfci 3 Refetch Table 158. Instruction timing by mnemonic (continued) Mnemonic Latency Serialization Comments |
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