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UPD6466GS Datasheet(PDF) 65 Page - NEC |
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UPD6466GS Datasheet(HTML) 65 Page - NEC |
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65 / 70 page ![]() 65 µPD6466 7. APPLICATION CIRCUIT EXAMPLE CLK CS DATA PCL VDD CMDCT OSCOUT OSCIN TEST GND Hsync Vsync VB VG VR VBLK VC2 BLK2 VC1 BLK1 Note 4(BBLK) Note 4(GBLK) Note 4(RBLK) PD6466GS/GT µ 20 (24) 19 (23) 18 (21) 17 (20) 16 (19) 15 (18) 14 (17) 13 (16) 12 (15) 11 (14) Output Inputs a negative Hsync or Vsync signal 1 (1) 2 (2) 3 (4) 4 (5) 5 (6) 6 (7) 7 (8)Note 3 8 (9)Note 3 9 (10) 10 (11) Connected to microcomputer VDD 10 F µ 100 k Ω 10 F µ Note 1 0.01 F µ + + VDD Note 2 Note 5 33 F µ 5 to 30 pF 30 pF MSB first LSB first LC module pin No. 1 LC module pin No. 3 Notes 1. CR constant must be satisfied with Power-ON Clear Specification (refer to 6. ELECTRICAL CHARACTERISTICS). 2. This circuit can reduce the number of external components and facilitates the adjustment of oscillation frequency, using LC module (part number: Q285NCIS-11181, manufactured by Toko, Inc.) 3. Connect these pins as follows when inputting external clock: OSCIN pin: external clock input, OSCOUT pin: open 4. Signals in ( ) are set by using an initial status setting command (RGB + RGB compatible blanking). 5. When this connection is open, LSB first is selected. Remarks 1. The number in the parentheses indicates the pin number of the µPD6466GT-xxx. 2. With the µPD6466GT-xxx, influence by noise via lead frame can be surpressed by connecting the N.C. pins (3, 12, 13, 22) to GND. |
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