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DLPC900 Datasheet(PDF) 8 Page - Texas Instruments |
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DLPC900 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 72 page  DLPC900 DLPS037A – OCTOBER 2014 – REVISED AUGUST 2015 www.ti.com DMD LVDS Interface Pin Functions (1) (2) (continued) PIN I/O CLK I/O TYPE DESCRIPTION POWER SYSTEM NAME NUMBER DDB_P_15 N1 DDB_N_15 N2 DDB_P_14 N3 DDB_N_14 N4 DDB_P_13 M2 DDB_N_13 M1 DDB_P_12 M3 DDB_N_12 M4 DDB_P_11 L1 DDB_N_11 L2 DDB_P_10 L3 DDB_N_10 L4 DDB_P_9 K1 DDB_N_9 K2 DDB_P_8 K3 DDB_N_8 K4 DCKB_P VDD18 O7 DMD, LVDS interface channel B, differential serial data DCKB_N DDB_P_7 H1 DDB_N_7 H2 DDB_P_6 H3 DDB_N_6 H4 DDB_P_5 G1 DDB_N_5 G2 DDB_P_4 G3 DDB_N_4 G4 DDB_P_3 F1 DDB_N_3 F2 DDB_P_2 F3 DDB_N_2 F4 DDB_P_1 E1 DDB_N_1 E2 DDB_P_0 D1 DDB_N_0 D2 Program Memory Flash Interface Pin Functions (1) PIN DESCRIPTION CHIP SELECT I/O CHIP SELECT 0 CHIP SELECT 2 I/O TYPE CLK SYSTEM 1 POWER NAME NUMBER (ADDITIONAL (ADDITIONAL (BOOT FLASH FLASH) FLASH) ONLY) (2) Chip select PM_CSZ_0 (3) D13 VDD33 O5 Async N/A N/A (active low) Boot flash chip PM_CSZ_1 (3) E12 VDD33 O5 Async N/A select N/A (active low) Chip select PM_CSZ_2 (3) A13 VDD33 O5 Async N/A N/A (active low) Address bit PM_ADDR_22 (4) A12 VDD33 B5 Async Address bit (MSB) Address bit (MSB) (MSB) PM_ADDR_21 (4) E11 VDD33 B5 Async Address bit Address bit Address bit PM_ADDR_20 D12 VDD33 O5 Async Address bit Address bit Address bit PM_ADDR_19 C12 VDD33 O5 Async Address bit Address bit Address bit PM_ADDR_18 B11 VDD33 O5 Async Address bit Address bit Address bit PM_ADDR_17 A11 VDD33 O5 Async Address bit Address bit Address bit PM_ADDR_16 D11 VDD33 O5 Async Address bit Address bit Address bit PM_ADDR_15 C11 VDD33 O5 Async Address bit Address bit Address bit (1) The default wait-state is set for a flash device of 120ns access time. Therefore, the slowest flash access time supported is 120ns. Refer to the Program Memory Flash Interface on how to program new wait-state values. (2) Refer to the Figure 21 for the memory layout of the boot flash. (3) Requires an external 10-k Ω pullup resistor. (4) Requires an external 10-k Ω pulldown resistor. 8 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: DLPC900 |
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